Make Concepts
Internal
Rule
A makefile consists of rules with the following syntax:
target ...: prerequisites
recipe
A target can be either the name of a file that is generated by the recipe, or the name of an action to carry out. These are phony named phony targets, because they are not files.
A prerequisite is a file that is used as input to create the target. A target often depends on several files.
A recipe is an action that "make" carries out. A recipe may have more than one command, either on the same line or each on its own line. You need to put a tab character at the beginning of every recipe line. Is this still true? Usually the recipe (re-)creates the target file if any of the prerequisites change. However, the rule that specifies a recipe for the target need not have prerequisites.
make Executes only the First Rule By Default
If not told otherwise, make will build the first target, along its prerequisites, then stop. If more than one files need to be generate, group them under common target, and put it in the first position in the file, or use .DEFAULT_GOAL.
.PHONY: generate_oapi_artifacts
generate_oapi_artifacts: spec.gen.go types.gen.go
spec.gen.go: ./petstore.yaml
oapi-codegen -generate spec -package petstore $< > $@
types.gen.go: ./petstore.yaml
oapi-codegen -generate types -package petstore $< > $@
.PHONY
By default, make targets are assumed to be files on disk. They will be built from other files as result of executing make with that name as argument. However, sometimes you want make to run commands that do not represent physical files in the filesystem, and if there's a file with the same name in the filesystem, make will be confused and will pick up the file. To avoid this, you can disambiguate with .PHONY:
.PHONY: clean
clean:
rm -rf *.o
.DEFAULT_GOAL
.DEFAULT_GOAL := some_target
Variables
CURDIR
CURDIR refers to the directory make is run from:
something:
"$(CURDIR)/scripts/something.sh"
Automatic Variables
$@
The file name of the target of the rule. In a pattern rule that has multiple targets $@ is the name of whichever target caused the rule’s recipe to be run.
$<
The name of the first prerequisite. For this rule:
types.gen.go: petstore.yaml
oapi-codegen -generate types -package petstore $< > $@
$< contains "petstore.yaml"
Custom Variables
Variables allow a text string to be defined once and substituted in multiple places later. A variable is a name defined in Makefile to represent a string of text, called the variable's value. These value are substituted in targets, prerequisites and other parts of the make file. A variable name may be any sequence of characters not containing ":", "#", "=", or whitespace. Variable names beginning with "." and an uppercase letter may be given special meaning in future versions of make. Variable names are case sensitive. It is traditional to use upper case letters in variable names, but we recommend using lower case letters for variable names that serve internal purposes in the makefile, and reserving upper case for parameters that control implicit rules or for parameters that the user should override with command options.
This is how a variable is declared:
my_var = something
This is how a variable is used:
prog.o: $(my_var)